Design of Several Important Peripheral Circuits of SRAM Based on 9T SRAM CellReport as inadecuate




Design of Several Important Peripheral Circuits of SRAM Based on 9T SRAM Cell - Download this document for free, or read online. Document in PDF available to download.

Read stability issue is becoming more and more concerned in accordance with rapid development of CMOS IC fabrication technology. A new nine transistor 9T SRAM cell with enhanced stability during a read operation and reduced power consumption is proposed recently. To put it into practical an SRAM based on the 9T cell need to be built. This paper designs three peripheral circuits that are needed in the building process, including row-selecting circuit suitable for the dual control signal character of 9T SRAM cell, simplified writing circuit that can effectively pull down the bit-lines and choose which to pull with only three N-type transistors and power-reduced sense amplifier with its switch transistor controlled by the logic ‘and’ result of one external and two internal signals that can shut down the circuit when there is enough voltage difference between outputs.

KEYWORDS

microelectronics and solid state electronics; peripheral circuit; digital circuit design; powerreduced sense amplifier; row-selecting circuit

Cite this paper







Author: Huizhuo Zhao

Source: http://www.scirp.org/



DOWNLOAD PDF




Related documents