A Survey of Soft-Error Mitigation Techniques for Non-Volatile MemoriesReport as inadecuate


A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories


A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories - Download this document for free, or read online. Document in PDF available to download.

E-621, Department of Computer Science and Engineering, Indian Institute of Technology IIT Hyderabad, Sangareddy, Telangana 502285, India





Academic Editor: Manuel E. Acacio

Abstract Non-volatile memories NVMs offer superior density and energy characteristics compared to the conventional memories; however, NVMs suffer from severe reliability issues that can easily eclipse their energy efficiency advantages. In this paper, we survey architectural techniques for improving the soft-error reliability of NVMs, specifically PCM phase change memory and STT-RAM spin transfer torque RAM. We focus on soft-errors, such as resistance drift and write disturbance, in PCM and read disturbance and write failures in STT-RAM. By classifying the research works based on key parameters, we highlight their similarities and distinctions. We hope that this survey will underline the crucial importance of addressing NVM reliability for ensuring their system integration and will be useful for researchers, computer architects and processor designers. View Full-Text

Keywords: reliability; non-volatile memory; PCM; STT-RAM; soft-error; read disturbance; write disturbance; resistance drift; error-correcting code ECC reliability; non-volatile memory; PCM; STT-RAM; soft-error; read disturbance; write disturbance; resistance drift; error-correcting code ECC





Author: Sparsh Mittal

Source: http://mdpi.com/



DOWNLOAD PDF




Related documents