AVSynDEx: A Rapid Prototyping Process Dedicated to the Implementation of Digital Image Processing Applications on Multi-DSP and FPGA ArchitecturesReport as inadecuate




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EURASIP Journal on Advances in Signal Processing

, 2002:896506

1.CNRS UMR IETR Institut en Electronique et Télécommunications de RennesINSA RennesRennes CedexFrance

Cite this article as: Fresse, V., Déforges, O. & Nezan, JF. EURASIP J. Adv. Signal Process. 2002 2002: 896506. https:-doi.org-10.1155-S1110865702205016 DOI https:-doi.org-10.1155-S1110865702205016 Publisher Name Springer International Publishing Online ISSN 1687-6180 About this journal Personalised recommendations

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Author: Virginie Fresse1

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