Improving NoC-based Testing Through Compression SchemesReport as inadecuate




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1 UFRGS - Instituto de Informática da UFRGS 2 LIRMM - Laboratoire d-Informatique de Robotique et de Microélectronique de Montpellier 3 SysMIC - Conception et Test de Systèmes MICroélectroniques LIRMM - Laboratoire d-Informatique de Robotique et de Microélectronique de Montpellier

Abstract : The effectiveness of the NoC reuse during test is very dependent on the number of test interfaces with the tester. This paper proposes a test scheduling method based on the use of a compression scheme to increase the number of test interfaces with the tester thus increasing test parallelism while still reusing available SoC pins and tester channels. We show that the combined approach allows test time minimization with minimal area overhead for systems with very few test interfaces.





Author: Erika Cota - Julien Dalmasso - Marie-Lise Flottes - Bruno Rouzeyre -

Source: https://hal.archives-ouvertes.fr/



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