Electro-thermal behaviour of a SiC JFET stressed by lightning-induced overvoltagesReport as inadecuate




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Abstract : JFET are experimentally stressed to provide data for modelling, inverter and driver design. The experimental set-up is described. A surge generator is built and a SiC JFET is stressed. During the stress, a temperature estimation is done at increasing time steps, in order to obtain the full thermal response versus time.

Keywords : invertors junction gate field effect transistors silicon compounds JFET SiC driver design electrothermal behaviour inverter design lightning-induced overvoltages temperature estimation Silicon Carbide Voltage Source Converter





Author: Dominique Bergogne - Asif Hammoud - Dominique Tournier - Cyril Buttay - Youness Amieh - Pascal Bevilacqua - Abderrahime Zaoui - H

Source: https://hal.archives-ouvertes.fr/



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