Efficient data access management for FPGA-Based image processing SoCsReport as inadecuate

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1 LTCI - Laboratoire Traitement et Communication de l-Information 2 GIPSA-GPIG - GPIG GIPSA-DIS - Département Images et Signal

Abstract : In this paper, we propose a low-cost n-dimensional cache nD-Cache architecture for FPGA-Based image and signal processing Systems On Chip SoCs. The architecture allows efficient access to structured data as in 2D or 3D images. We developed a theoretical model for our architecture. It gives a methodology to define cache-s practical implementation based on the application and system parameters. Complexity and performance measurements for selected image processing algorithms like jumping snake and 2D Back-Projection are done and compared to classical solutions like associative caches. The architecture is shown to be efficient for tracking algorithm applications by exploiting spacial and temporal locality. Numerical results indicate that 50% improvement in run-time performance can be achieved.

Keywords : image processing FPGA SoC cache memory structured data caching Adaptative Predictive Cache image processing.

Author: Zahir Larabi - Yves Mathieu - Stéphane Mancini -

Source: https://hal.archives-ouvertes.fr/


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