High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPPReport as inadecuate

High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP - Download this document for free, or read online. Document in PDF available to download.

International Journal of Reconfigurable ComputingVolume 2012 2012, Article ID 752910, 15 pages

Review Article

Institute of Integrated Systems, School of Engineering, The University of Edinburgh, Kings Buildings, Mayfield Road, Edinburgh EH9 3JL, UK

Electrical and Computer Engineering Department, The University of Arizona, Tucson, AZ 85721-0104, USA

Received 15 December 2011; Revised 13 February 2012; Accepted 17 February 2012

Academic Editor: Kentaro Sano

Copyright © 2012 Khaled Benkrid et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


This paper explores the pros and cons of reconfigurable computing in the form of FPGAs for high performance efficient computing. In particular, the paper presents the results of a comparative study between three different acceleration technologies, namely, Field Programmable Gate Arrays FPGAs, Graphics Processor Units GPUs, and IBM’s Cell Broadband Engine Cell BE, in the design and implementation of the widely-used Smith-Waterman pairwise sequence alignment algorithm, with general purpose processors as a base reference implementation. Comparison criteria include speed, energy consumption, and purchase and development costs. The study shows that FPGAs largely outperform all other implementation platforms on performance per watt criterion and perform better than all other platforms on performance per dollar criterion, although by a much smaller margin. Cell BE and GPU come second and third, respectively, on both performance per watt and performance per dollar criteria. In general, in order to outperform other technologies on performance per dollar criterion using currently available hardware and development tools, FPGAs need to achieve at least two orders of magnitude speed-up compared to general-purpose processors and one order of magnitude speed-up compared to domain-specific technologies such as GPUs.

Author: Khaled Benkrid, Ali Akoglu, Cheng Ling, Yang Song, Ying Liu, and Xiang Tian

Source: https://www.hindawi.com/


Related documents